PVT ROBUST CLOSED LOOP CMOS BIAS FOR LINEAR POWER AMPLIFIER

• Main Authors: Cohen Avi, Pongratz Ron
• Format: Patent
• Language: English
• Published: 13.04.2017
• Subjects: AMPLIFIERS; BASIC ELECTRONIC CIRCUITRY; ELECTRICITY

A biasing device for direct current (DC) biasing a linear power amplifier that comprises multiple linear power amplifier circuits that are ideally identical to each other; wherein the biasing device may include a replica circuit that is a replica of a linear power amplifier circuit of the multiple linear power amplifier circuits; and a bias control circuit; wherein the bias control circuit is configured to feed the replica circuit with one or more DC biasing signals thereby maintaining at a constant value a replica DC current that is consumed by the replica circuit, and maintaining at a fixed value a replica DC voltage of a replica output node of the replica circuit; and wherein the replica circuit is coupled the multiple linear power amplifier circuits and is configured to supply DC voltage bias signals that force each linear power amplifier circuit of the multiple linear power amplifier circuits to consume a linear power amplifier circuit DC current that equals the replica DC current, when the linear power amplifier circuit is fed with a linear power amplifier DC voltage that either equals the replica DC voltage or differs from the replica DC voltage by a fraction of the replica DC voltage.