SEMICONDUCTOR PACKAGE WITH EMBEDDED CAPACITOR AND METHODS OF MANUFACTURING SAME
A semiconductor package with an embedded capacitor and corresponding manufacturing methods are described. The semiconductor package with the embedded capacitor includes a semiconductor die having a first metal layer extending across at least a portion of a first side of the semiconductor die and a p...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
23.03.2017
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor package with an embedded capacitor and corresponding manufacturing methods are described. The semiconductor package with the embedded capacitor includes a semiconductor die having a first metal layer extending across at least a portion of a first side of the semiconductor die and a package structure formed on the first side of the semiconductor die. A first electrical conductor of the embedded capacitor is formed in the first metal layer of the semiconductor die. The package structure includes a second metal layer that has formed therein a second electrical conductor of the embedded capacitor. A dielectric of the embedded capacitor is positioned within either the semiconductor die or the package structure of the semiconductor package to isolate the first electrical conductor from the second electrical conductor of the embedded capacitor. |
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Bibliography: | Application Number: US201615371488 |