PROCESSOR AND METHOD OF HANDLING AN INSTRUCTION DATA THEREIN

The method can be performed in a processor integrated circuit having an instruction decoder and a plurality of shared resources, a resource tracker having a plurality of credit units associated to corresponding ones of the shared resources in a manner to be updatable based on availability of the sha...

Full description

Saved in:
Bibliographic Details
Main Authors VINCENT JOHN EDWARD, LEE CHANG, KAMENDJE TCHOKOBOU GUY-ARMAND, SINN PETER MAN-KIN, HAMELIN LOUIS-PHILIPPE, ALEPIN PAUL, DARCY OLIVIER
Format Patent
LanguageEnglish
Published 02.03.2017
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:The method can be performed in a processor integrated circuit having an instruction decoder and a plurality of shared resources, a resource tracker having a plurality of credit units associated to corresponding ones of the shared resources in a manner to be updatable based on availability of the shared resources, a resource matcher connected to receive a resource requirement signal from the decoder and connected to receive a resource availability signal from the resource tracker. The method can include: performing a determination of whether or not the resource requirement signal matches the resource availability signal, and, upon a positive determination, dispatching a corresponding instruction data, updating the status of a corresponding one or more of the credit units, and preventing the resource matcher from performing a subsequent determination for given period of time after the positive determination.
Bibliography:Application Number: US201615005553