CONSERVING POWER BY REDUCING VOLTAGE SUPPLIED TO AN INSTRUCTIONS-PROCESSING PORTION OF A PROCESSOR
One embodiment of the present invention provides a system that facilitates reducing static power consumption of a processor. During operation, the system receives a signal indicating that instruction execution within the processor is to be temporarily halted. In response to this signal, the system h...
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Main Author | |
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Format | Patent |
Language | English |
Published |
02.03.2017
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Subjects | |
Online Access | Get full text |
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Summary: | One embodiment of the present invention provides a system that facilitates reducing static power consumption of a processor. During operation, the system receives a signal indicating that instruction execution within the processor is to be temporarily halted. In response to this signal, the system halts an instruction-processing portion of the processor, and reduces the voltage supplied to the instruction-processing portion of the processor. Full voltage is maintained to a remaining portion of the processor, so that the remaining portion of the processor can continue to operate while the instruction-processing portion of the processor is in reduced power mode. |
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Bibliography: | Application Number: US201615349313 |