LATENCY-OPTIMIZED PHYSICAL CODING SUBLAYER
A system for reducing latency in a networking application includes a first clock domain operating at a first clock frequency, where a media access control (MAC) sublayer sends data to a physical coding sublayer (PCS) utilizing the first clock domain. The system also includes a second clock domain op...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
09.02.2017
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Subjects | |
Online Access | Get full text |
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Summary: | A system for reducing latency in a networking application includes a first clock domain operating at a first clock frequency, where a media access control (MAC) sublayer sends data to a physical coding sublayer (PCS) utilizing the first clock domain. The system also includes a second clock domain operating at a second clock frequency, where data is transmitted on one or more physical medium attachment (PMA) lanes utilizing the second clock domain, and where the first clock frequency and the second clock frequency have a fixed ratio. Data is transmitted from the first clock domain to the second clock domain without buffering the data |
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Bibliography: | Application Number: US201615299193 |