TRENCH GATE POWER SEMICONDUCTOR FIELD EFFECT TRANSISTOR
Provided in the present invention is a trench gate power MOSFET (TMOS/UMOS) structure with a heavily doped polysilicon source region. The polysilicon source region is formed by deposition, and a trench-shaped contact hole is used at the source region, in order to attain low contact resistance and sm...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
22.12.2016
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Subjects | |
Online Access | Get full text |
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Summary: | Provided in the present invention is a trench gate power MOSFET (TMOS/UMOS) structure with a heavily doped polysilicon source region. The polysilicon source region is formed by deposition, and a trench-shaped contact hole is used at the source region, in order to attain low contact resistance and small cell pitch. The present invention may also be implemented in an IGBT. |
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Bibliography: | Application Number: US201414771089 |