CONFIGURABLE MAPPING OF TIMER CHANNELS TO PROTECTION GROUPS

An apparatus and method for mapping timer channels to protection groups. One embodiment of the method can be implemented in a microcontroller unit (MCU) that comprises a central processing unit (CPU) coupled to a plurality of timer channels and a plurality of programmable group output disable (PTGOD...

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Bibliographic Details
Main Author Brabender Jon Matthew
Format Patent
LanguageEnglish
Published 08.12.2016
Subjects
CONTROL OR REGULATING SYSTEMS IN GENERAL
CONTROLLING
FUNCTIONAL ELEMENTS OF SUCH SYSTEMS
MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS
PHYSICS
REGULATING
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Summary:An apparatus and method for mapping timer channels to protection groups. One embodiment of the method can be implemented in a microcontroller unit (MCU) that comprises a central processing unit (CPU) coupled to a plurality of timer channels and a plurality of programmable group output disable (PTGOD) circuits. The CPU can select a first group of the timer channels to respond to an assertion of a first output disable signal from a first of the PTGOD circuits. Each timer channel of the first group can disable an output signal in response to receiving the assertion of the first output disable signal.
Bibliography:Application Number: US201514732108