Run Time ECC Error Injection Scheme for Hardware Validation

Systems and methods for a run-time error correction code ("ECC") error injection scheme for hardware validation are disclosed. The systems and methods include configuring a read path to internally forward read data, and injecting at least one faulty bit into the forwarded read data via a r...

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Bibliographic Details
Main Authors Rangarajan Sankar, Ivey Brant, Catherwood Michael
Format Patent
LanguageEnglish
Published 06.10.2016
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Systems and methods for a run-time error correction code ("ECC") error injection scheme for hardware validation are disclosed. The systems and methods include configuring a read path to internally forward read data, and injecting at least one faulty bit into the forwarded read data via a read fault injection logic. The systems and methods may also include configuring a write path to internally forward write data, and injecting at least one faulty bit into the forwarded write data via a write fault injection logic.
Bibliography:Application Number: US201615089352