SYSTEM AND METHOD OF ANALYZING INTEGRATED CIRCUIT IN CONSIDERATION OF A PROCESS VARIATION
A method of analyzing an integrated circuit, which is implemented by a computing system or a processor, wherein an interconnection of a first net of the integrated circuit includes at least one conducting segment corresponding to one wiring layer or one via, includes receiving a plurality of resista...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
29.09.2016
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Subjects | |
Online Access | Get full text |
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Summary: | A method of analyzing an integrated circuit, which is implemented by a computing system or a processor, wherein an interconnection of a first net of the integrated circuit includes at least one conducting segment corresponding to one wiring layer or one via, includes receiving a plurality of resistances and a plurality of capacitances, which correspond to the first net, based on a process variation, counting a number of conducting segments corresponding to the first net, and calculating a first resistance or a first capacitance of the first net, based on the number of conducting segments, the plurality of resistances, and the plurality of capacitances. |
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Bibliography: | Application Number: US201615081291 |