GATE OFF DELAY COMPENSATION CIRCUIT AND LIGHT APPARATUS HAVING THE SAME

A gate off delay compensation circuit includes a sensing interval determiner configured to determine an interval in which a driving voltage corresponds to a first and second level of a reference voltage as a driving voltage sensing interval, a driving voltage excess interval determiner configured to...

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Bibliographic Details
Main Authors YOON Jong Hyun, CUI Zhi Yuan, LIM Gyu Ho, RYU Yong Gi
Format Patent
LanguageEnglish
Published 15.09.2016
Subjects
ELECTRIC HEATING
ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
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Summary:A gate off delay compensation circuit includes a sensing interval determiner configured to determine an interval in which a driving voltage corresponds to a first and second level of a reference voltage as a driving voltage sensing interval, a driving voltage excess interval determiner configured to determine a driving voltage excess interval defined as an interval in which the driving voltage is larger than the reference voltage and a driving voltage period determiner configured to determine a period of the driving voltage based on the driving voltage sensing interval and the driving voltage excess interval. Therefore, a gate off delay compensation circuit 100 decreases an average driving current and an average driving voltage and allows decrease of a variation of a driving current according to a change of a input voltage VIN.
Bibliography:Application Number: US201615051371