PROCESSOR WITH EFFICIENT ARITHMETIC UNITS
A processor includes a carry save array multiplier. The carry save array multiplier includes an array of cascaded partial product generators. The array of cascaded partial product generators is configured to generate an output value as a product of two operands presented at inputs of the multiplier....
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
11.08.2016
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Subjects | |
Online Access | Get full text |
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Summary: | A processor includes a carry save array multiplier. The carry save array multiplier includes an array of cascaded partial product generators. The array of cascaded partial product generators is configured to generate an output value as a product of two operands presented at inputs of the multiplier. The array of cascaded partial product generators is also configured to generate an output value as a sum of two operands presented at inputs of the multiplier. |
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Bibliography: | Application Number: US201615132280 |