SEMICONDUCTOR MEMORY APPARATUS AND DATA INPUT/OUTPUT METHOD THEREOF

A semiconductor memory apparatus may include a write data bus inversion unit and a write data polarity change unit. The write data bus inversion unit may invert a level of an input data and may generate an inversion change data when a majority of the input data have a predetermined level. The write...

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Bibliographic Details
Main Author KU Kie Bong
Format Patent
LanguageEnglish
Published 04.08.2016
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A semiconductor memory apparatus may include a write data bus inversion unit and a write data polarity change unit. The write data bus inversion unit may invert a level of an input data and may generate an inversion change data when a majority of the input data have a predetermined level. The write data polarity change unit may invert a level of the inversion change data based on a write signal and a first bank address signal and generate a polarity change data.
Bibliography:Application Number: US201514713738