METHOD AND APPARATUS FOR AN INTEGRATED CAPACITOR

An integrated capacitor can be fabricated with both electrodes formed by trenches for low resistance. According to one embodiment, the capacitor can comprise a first trench electrode, one or more dielectric layers, and a second trench electrode. The first trench electrode and the second trench elect...

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Main Authors WU RONGXIANG, SIN KIN ON JOHNNY, FANG XIANGMING
Format Patent
LanguageEnglish
Published 14.07.2016
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Abstract An integrated capacitor can be fabricated with both electrodes formed by trenches for low resistance. According to one embodiment, the capacitor can comprise a first trench electrode, one or more dielectric layers, and a second trench electrode. The first trench electrode and the second trench electrode can be fabricated in different trenches to improve capacitance density and resistance of the integrated capacitor.
AbstractList An integrated capacitor can be fabricated with both electrodes formed by trenches for low resistance. According to one embodiment, the capacitor can comprise a first trench electrode, one or more dielectric layers, and a second trench electrode. The first trench electrode and the second trench electrode can be fabricated in different trenches to improve capacitance density and resistance of the integrated capacitor.
Author SIN KIN ON JOHNNY
WU RONGXIANG
FANG XIANGMING
Author_xml – fullname: WU RONGXIANG
– fullname: SIN KIN ON JOHNNY
– fullname: FANG XIANGMING
BookMark eNrjYmDJy89L5WQw8HUN8fB3UXD0A-KAAMcgx5DQYAU3_yCgiIKnX4irO1DE1UXB2THA0dkzxD-Ih4E1LTGnOJUXSnMzKLu5hjh76KYW5MenFhckJqfmpZbEhwYbGRiaGRmYGFpYOhoaE6cKAKqOKMM
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
ExternalDocumentID US2016204189A1
GroupedDBID EVB
ID FETCH-epo_espacenet_US2016204189A13
IEDL.DBID EVB
IngestDate Fri Aug 30 05:41:12 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_US2016204189A13
Notes Application Number: US201614991078
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160714&DB=EPODOC&CC=US&NR=2016204189A1
ParticipantIDs epo_espacenet_US2016204189A1
PublicationCentury 2000
PublicationDate 20160714
PublicationDateYYYYMMDD 2016-07-14
PublicationDate_xml – month: 07
  year: 2016
  text: 20160714
  day: 14
PublicationDecade 2010
PublicationYear 2016
RelatedCompanies THE HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
RelatedCompanies_xml – name: THE HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
Score 3.0399995
Snippet An integrated capacitor can be fabricated with both electrodes formed by trenches for low resistance. According to one embodiment, the capacitor can comprise a...
SourceID epo
SourceType Open Access Repository
SubjectTerms ELECTRICITY
Title METHOD AND APPARATUS FOR AN INTEGRATED CAPACITOR
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160714&DB=EPODOC&locale=&CC=US&NR=2016204189A1
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_GFPVNp-LHlILSt-LaZl37UKRLW6vQD7ZW9jbSNQNBuuEq_vteQqd72kMguYPLB_xyuUvuAvDIbKc0dX2pOQ4jwnWz0ErDMjRu2pwYBrcqLuKd48SKCvI2G8468LmNhZF5Qn9kckRE1ALx3sj9ev3vxPLl28rNU_mBpNVzmLu-2lrHMlsaUf2xG2Spn1KVUreYqslE8owB0W3HQ1vpAA_SI4GH4H0s4lLWu0olPIXDDOXVzRl0eN2DY7r9e60HR3F75Y3VFn2bcxjEQR6lvuIlWLLMm3h5MVXQjEOKInLbviAl8BXqZR59zdPJBTyEQU4jDbue_810Xkx3x2leQrde1fwKFFYtOWO2yewhI8TkpVUZwrLV2WhQWgv7Gvr7JN3sZ9_CiWgKl6VO-tBtvr75HerapryXS_QLneF9Ig
link.rule.ids 230,309,783,888,25576,76876
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_GFOebTsWPqQWlb8W1zbr2YUiXdna6frC1sreRrhkI0g1X8d_3Ejbd0x4C4Q4uH_BLcpfcLwCPzHZyU9cXmuMwIkI3cy03LEPjps2JYXCr4CLfOYysICOv0860Bp_bXBjJE_ojyRERUXPEeyXX69V_EMuTbyvXT_kHipbPg7TnqRvvWLKlEdXr9_wk9mKqUtrLJmo0ljqjTXTbcdFXOsBDdlfgwX_vi7yU1e6mMjiBwwTtldUp1HjZhAbd_r3WhKNwc-WN1Q361mfQDv00iD3FjbAkiTt202yioBuHEkVw276gxPcU6iYuHabx-BweBn5KAw2bnv2NdJZNdvtpXkC9XJb8EhRWLDhjtsnsDiPE5LlVGMKz1Vm3nVtz-wpa-yxd71ffQyNIw9FsNIzebuBYqET4UictqFdf3_wW990qv5PT9QunYIAV
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=METHOD+AND+APPARATUS+FOR+AN+INTEGRATED+CAPACITOR&rft.inventor=WU+RONGXIANG&rft.inventor=SIN+KIN+ON+JOHNNY&rft.inventor=FANG+XIANGMING&rft.date=2016-07-14&rft.externalDBID=A1&rft.externalDocID=US2016204189A1