SYSTEM AND METHOD FOR MANAGING BANDWIDTH AND POWER CONSUMPTION THROUGH DATA FILTERING

Various embodiments of methods and systems for managing write transaction volume from a master component to a long term memory component in a system on a chip ("SoC") are disclosed. Because power consumption and bus bandwidth are unnecessarily consumed when ephemeral data is written back t...

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Main Authors TIRI KRIS, WOO JEONG-HO, RYCHLIK BOHUSLAV, KHAN MOINUL, TURNER ANDREW EDMUND, PATSILARAS GEORGE, ROHILLAH ANWAR, WANG FENG, PALACHARLA SUBBARAO
Format Patent
LanguageEnglish
Published 16.06.2016
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Various embodiments of methods and systems for managing write transaction volume from a master component to a long term memory component in a system on a chip ("SoC") are disclosed. Because power consumption and bus bandwidth are unnecessarily consumed when ephemeral data is written back to long term memory (such as a double data rate "DDR" memory) from a closely coupled memory component (such as a low level cache "LLC" memory) of a data generating master component, embodiments of the solutions seek to identify write transactions that contain ephemeral data and prevent the ephemeral data from being written to DDR.
Bibliography:Application Number: US201414571876