SECONDARY CPU MMU INITIALIZATION USING PAGE FAULT EXCEPTION
In a computer system with multiple central processing units (CPUs), initialization of a memory management unit (MMU) for a secondary CPU is performed using an exception generated by the MMU. In general, this technique leverages the exception handling features of the secondary CPU to switch the CPU f...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
16.06.2016
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Subjects | |
Online Access | Get full text |
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Summary: | In a computer system with multiple central processing units (CPUs), initialization of a memory management unit (MMU) for a secondary CPU is performed using an exception generated by the MMU. In general, this technique leverages the exception handling features of the secondary CPU to switch the CPU from executing secondary CPU initialization code with the MMU "off" to executing secondary CPU initialization code with the MMU "on." Advantageously, in contrast to conventional techniques for MMU initialization, this exception-based technique does not require identity mapping of the secondary CPU initialization code to ensure proper execution of the secondary CPU initialization code. |
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Bibliography: | Application Number: US201414572505 |