STRUCTURE AND METHOD FOR PROVIDING LINE END EXTENSIONS FOR FIN-TYPE ACTIVE REGIONS

A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy gate stack m...

Full description

Saved in:
Bibliographic Details
Main Authors SHIEH MING-FENG, CHANG CHANG-YUN, CHEN HSINIH, LIN YI-TANG, LU KUEI-LIANG, CHANG KAI-TAI, YU SHAO-MING, CHANG CHIH-HAO
Format Patent
LanguageEnglish
Published 09.06.2016
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.
Bibliography:Application Number: US201414586602