MEMORY PAGE BUFFER
One aspect of the technology is a memory device, which comprises a plurality of page buffers and control circuitry. Different page buffer circuits in the plurality of page buffer circuits are coupled to different bit lines in a plurality of bit lines in a memory array. The control circuitry is respo...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
14.04.2016
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Subjects | |
Online Access | Get full text |
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Summary: | One aspect of the technology is a memory device, which comprises a plurality of page buffers and control circuitry. Different page buffer circuits in the plurality of page buffer circuits are coupled to different bit lines in a plurality of bit lines in a memory array. The control circuitry is responsive to a program command to program multiple cells in the memory array, by setting, via the plurality of page buffer circuits, different target voltages at a same time for the different bit lines coupled to the multiple cells. |
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Bibliography: | Application Number: US201414513899 |