Vertical Hybrid Integrated MEMS ASIC Component Having A Stress Decoupling Structure

Method for on-chip stress decoupling to reduce stresses in a vertical hybrid integrated component including MEMS and ASIC elements and to mechanical decoupling of the MEMS structure. The MEMS/ASIC elements are mounted above each other via at least one connection layer and form a chip stack. On the a...

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Main Authors REINMUTH JOCHEN, HEUCK FRIEDJOF, HATTASS MIRKO, KRAMER TORSTEN, NEUL REINHARD, REICHENBACH RALF, MEISEL DANIEL CHRISTOPH, TEBJE LARS, CLASSEN JOHANNES, PUYGRANIER ANTOINE
Format Patent
LanguageEnglish
Published 10.12.2015
Subjects
MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES
MICROSTRUCTURAL TECHNOLOGY
PERFORMING OPERATIONS
TRANSPORTING
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Summary:Method for on-chip stress decoupling to reduce stresses in a vertical hybrid integrated component including MEMS and ASIC elements and to mechanical decoupling of the MEMS structure. The MEMS/ASIC elements are mounted above each other via at least one connection layer and form a chip stack. On the assembly side, at least one connection area is formed for the second level assembly and for external electrical contacting of the component on a component support. At least one flexible stress decoupling structure is formed in one element surface between the assembly side and the MEMS layered structure including the stress-sensitive MEMS structure, in at least one connection area to the adjacent element component of the chip stack or to the component support, the stress decoupling structure being configured so that the connection material does not penetrate into the stress decoupling structure and flexibility of the stress decoupling structure is ensured.
Bibliography:Application Number: US201514731695