SEMICONDUCTOR DEVICES

A semiconductor device includes a normal test signal generator and a termination signal generator. The normal test signal generator is suitable for generating a first enablement signal and a first pulse signal in response to an external command signal when a first code signal and a second code signa...

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Bibliographic Details
Main Author KIM KWAN WEON
Format Patent
LanguageEnglish
Published 06.08.2015
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A semiconductor device includes a normal test signal generator and a termination signal generator. The normal test signal generator is suitable for generating a first enablement signal and a first pulse signal in response to an external command signal when a first code signal and a second code signal have a predetermined logic combination. Further, the normal test signal generator is suitable for decoding a first test address signal and a second test address signal to generate first to fourth normal test signals. The termination signal generator is suitable for receiving the first pulse signal during an enablement period of the first enablement signal to generate a first termination signal which is enabled when a predetermined signal among the first to fourth normal test signals is generated.
Bibliography:Application Number: US201414174572