Semiconductor Structure With Inlaid Capping Layer And Method Of Manufacturing The Same
A method of fabricating a semiconductor structure includes forming a dielectric layer overlaying a substrate; forming a trench in the dielectric layer; forming a first barrier layer lining the trench; forming a conductive layer overlaying the first barrier layer; forming a second barrier layer overl...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
16.07.2015
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Subjects | |
Online Access | Get full text |
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Summary: | A method of fabricating a semiconductor structure includes forming a dielectric layer overlaying a substrate; forming a trench in the dielectric layer; forming a first barrier layer lining the trench; forming a conductive layer overlaying the first barrier layer; forming a second barrier layer overlaying the conductive layer; forming a metallic sacrificial layer to cover the second barrier layer and to fill the trench; and performing a polishing process to remove the materials above a bottom portion of the second barrier layer. |
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Bibliography: | Application Number: US201414155682 |