Methods of Forming Wiring Structures and Methods of Fabricating Semiconductor Devices
Methods of forming a wiring structure are provided including forming an insulating interlayer on a substrate and forming a sacrificial layer on the insulating interlayer. The sacrificial layer is partially removed to define a plurality of openings. Wiring patterns are formed in the openings. The sac...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
09.07.2015
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Subjects | |
Online Access | Get full text |
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Summary: | Methods of forming a wiring structure are provided including forming an insulating interlayer on a substrate and forming a sacrificial layer on the insulating interlayer. The sacrificial layer is partially removed to define a plurality of openings. Wiring patterns are formed in the openings. The sacrificial layer is transformed into a modified sacrificial layer by a plasma treatment. The modified sacrificial layer is removed by a wet etching process. An insulation layer covering the wiring patterns is formed on the insulating interlayer. The insulation layer defines an air gap therein between neighboring wiring patterns. |
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Bibliography: | Application Number: US201414516774 |