INTEGRATED CIRCUIT DEFECT DETECTION AND REPAIR

In accordance with the present description, a device includes an internal defect detection and repair circuit which includes a self-test logic circuit built in within the device and a self-repair logic circuit also built in within the device. In one embodiment, the built in self-test logic circuit m...

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Bibliographic Details
Main Authors QUERBACH BRUCE, ZIMMERMAN DAVID J, HAMPSON CHRISTOPHER W, SCHOENBORN THEODORE Z, WAN IFAR, LUI WILLIAM K, ELLIS DAVID G, ZHANG YULAN
Format Patent
LanguageEnglish
Published 02.07.2015
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:In accordance with the present description, a device includes an internal defect detection and repair circuit which includes a self-test logic circuit built in within the device and a self-repair logic circuit also built in within the device. In one embodiment, the built in self-test logic circuit may be configured to automatically identify defective memory cells in a memory. Upon identifying one or more defective memory cells, the built in self-repair logic circuit may be configured to automatically repair the defective memory cells by replacing defective cells with spare cells within the memory. In one embodiment, data patterns are generated as a function of memory addresses and periodic address offsets. Other aspects are described herein.
Bibliography:Application Number: US201414320164