SEMICONDUCTOR MEMORY DEVICE FOR USE IN MULTI-CHIP PACKAGE
Provides is a multi-chip package including a plurality of semiconductor memory devices. Each of semiconductor memory devices includes a register and a control circuit. The register is configured to store start sequence information representing start of execution of a refresh operation in the multi-c...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
11.06.2015
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Subjects | |
Online Access | Get full text |
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Summary: | Provides is a multi-chip package including a plurality of semiconductor memory devices. Each of semiconductor memory devices includes a register and a control circuit. The register is configured to store start sequence information representing start of execution of a refresh operation in the multi-chip package. The control circuit is configured to control start of the execution of the refresh operation in response to the start sequence information stored in the register. Since the start of the execution of the refresh operation is performed in sequence of respective semiconductor memory devices according to the start sequence information stored in the register, consumption of peak current may be reduced in a power saving mode. |
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Bibliography: | Application Number: US201414336689 |