ADDRESS WINDOWING FOR AT-SPEED BITMAPPING WITH MEMORY BUILT-IN SELF-TEST

Integrated circuits with memory built-in self-test (BIST) logic and methods of testing using the same are disclosed. The method includes setting an address window for locating defects in a memory array. The method further includes comparing output data of the memory array to expected data to determi...

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Bibliographic Details
Main Authors VONREYN TIMOTHY J, RODRIGUEZ GEOVANNY, VINCENT BRIAN J
Format Patent
LanguageEnglish
Published 04.12.2014
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:Integrated circuits with memory built-in self-test (BIST) logic and methods of testing using the same are disclosed. The method includes setting an address window for locating defects in a memory array. The method further includes comparing output data of the memory array to expected data to determine that a defect exists at location "M" in the memory array within the address window. The method further includes storing, in registers, the address M and a resultant bit fail vector associated with the location "M" of the defect found in the memory array. The method further includes resetting the registers to a null value and resetting the address window with a new minimum and maximum address pair, to compare the output data of the memory array to the expected data within the reset address window which excludes address M.
Bibliography:Application Number: US201313903434