LOW ENERGY COLLIMATED ION MILLING OF SEMICONDUCTOR STRUCTURES
A method of delayering a surface of a semiconductor structure may include applying a voltage in the range of about 50 eV to less than 300 eV to an inductively coupled Argon ion source operating at a radio frequency. A collimated ion beam incident on the surface of the semiconductor structure may be...
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Main Author | |
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Format | Patent |
Language | English |
Published |
02.10.2014
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Subjects | |
Online Access | Get full text |
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Summary: | A method of delayering a surface of a semiconductor structure may include applying a voltage in the range of about 50 eV to less than 300 eV to an inductively coupled Argon ion source operating at a radio frequency. A collimated ion beam incident on the surface of the semiconductor structure may be generated, from the Argon ion source, for the planar removal of layers of the surface. A structural material underlying the surface of the semiconductor structure is exposed using an end-point detector based on the planar removal of the layers. |
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Bibliography: | Application Number: US201313851148 |