MEASURING DIELECTRIC BREAKDOWN IN A DYNAMIC MODE

Embodiments of the present invention provide a method, system, and program product for testing a semiconductor device to measure dielectric breakdown. A computer applies a plurality of stress voltages to a semiconductor device under test. The computer determines a plurality of current measurements u...

Full description

Saved in:
Bibliographic Details
Main Authors CARTIER EDUARD A, LAROW CHARLES, MERRILL TRAVIS S, WU ERNEST Y
Format Patent
LanguageEnglish
Published 10.07.2014
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
Online AccessGet full text

Cover

More Information
Summary:Embodiments of the present invention provide a method, system, and program product for testing a semiconductor device to measure dielectric breakdown. A computer applies a plurality of stress voltages to a semiconductor device under test. The computer determines a plurality of current measurements until a failure criteria occurs, using a predefined voltage ramp rate and a predefined plurality of stress voltage steps, wherein the number of the plurality of current measurements is less than or equal to the number of the predefined plurality of voltage steps. The computer identifies a stress voltage at which the semiconductor device fails. The computer calculates a frequency dependent voltage acceleration factor based on the quotient of the natural log of the voltage at which the semiconductor device under test failed to the natural log of the predetermined voltage ramp rate.
Bibliography:Application Number: US201313734075