METHODS AND APPARATUS FOR ERROR CODING
Methods and apparatus are described for implementing low-density parity-check codes. These may be used in electronic communications, such as wireless communication systems. A number of processes are implemented for each vector in a plurality of vectors of a coding matrix associated with a low-densit...
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Main Author | |
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Format | Patent |
Language | English |
Published |
19.06.2014
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Subjects | |
Online Access | Get full text |
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Summary: | Methods and apparatus are described for implementing low-density parity-check codes. These may be used in electronic communications, such as wireless communication systems. A number of processes are implemented for each vector in a plurality of vectors of a coding matrix associated with a low-density parity-check code. These include retrieving, from one or more interleavers, one or more addresses, using the or each retrieved address to retrieve one or more symbols from data and determining a parity-check operation corresponding to a particular said vector using said one or more symbols retrieved from said data. This enables an encoded block to be generated using said data and each of the parity-check operations. It also enables a received code vector to be decoded. |
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Bibliography: | Application Number: US201314108759 |