CODING TECHNIQUES FOR REDUCING WRITE CYCLES FOR MEMORY
Structures and methods for encoding data to reduce write cycles in a semiconductor memory device are disclosed herein. In one embodiment, a method of writing data to a semiconductor memory device can include: (i) determining a number of significant bits for data to be written in the semiconductor me...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
29.05.2014
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Subjects | |
Online Access | Get full text |
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Summary: | Structures and methods for encoding data to reduce write cycles in a semiconductor memory device are disclosed herein. In one embodiment, a method of writing data to a semiconductor memory device can include: (i) determining a number of significant bits for data to be written in the semiconductor memory device; (ii) determining a tag associated with the data to be written in the semiconductor memory device, where the tag is determined based on the determined number of significant bits; (iii) encoding the data when the tag has a first state, where the tag is configured to indicate data encoding that comprises using N bits of the encoded data to store M bits of the data, where M and N are both positive integers and N is greater than M; and (iv) writing the encoded data and the tag in the semiconductor memory device. |
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Bibliography: | Application Number: US201213687147 |