SYSTEMS, PROCESSES AND INTEGRATED CIRCUITS FOR RATE AND/OR DIVERSITY ADAPTATION FOR PACKET COMMUNICATIONS

• Main Authors: MCCREE ALAN V, ANANDAKUMAR KRISHNASAMY
• Format: Patent
• Language: English
• Published: 15.05.2014
• Subjects: ACOUSTICS; ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; MULTIPLEX COMMUNICATION; MUSICAL INSTRUMENTS; PHYSICS; SPEECH ANALYSIS OR SYNTHESIS; SPEECH OR AUDIO CODING OR DECODING; SPEECH OR VOICE PROCESSING; SPEECH RECOGNITION; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION; WIRELESS COMMUNICATIONS NETWORKS

An IC processor circuit has an interface for a microphone and a packet switched network. A memory holds bits for converting audible speech from the microphone into digital data in each of successive frames. For each frame the converting includes forming LPC data, LTP lag data, parity check data, adaptive and fixed codebook gain data, and fixed codebook pulse data. The digital data representing the audible speech for the frames is placed into sequential packets, with each packet having a primary stage and a secondary stage. The placing includes arranging data from a first frame of speech in the primary stage of a first packet and arranging data from the first frame of speech in the secondary stage of a second packet, which follows the first packet. The data in the secondary stage includes only LPC data, LTP lag data, parity check data, and adaptive and fixed codebook gain data.