SEMICONDUCTOR MEMORY DEVICE

According to one embodiment, a semiconductor memory device includes memory units each of which includes first and second select transistors and memory cells connected in series between the first and second select transistors. A control circuit applies a first potential difference between a source an...

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Bibliographic Details
Main Author FUKUZUMI YOSHIAKI
Format Patent
LanguageEnglish
Published 27.03.2014
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:According to one embodiment, a semiconductor memory device includes memory units each of which includes first and second select transistors and memory cells connected in series between the first and second select transistors. A control circuit applies a first potential difference between a source and a drain of either the first or second select transistor in a first memory unit, thereby programming either the first or second select transistor. The control circuit applies a second potential difference between a source and a drain of either the first or second select transistor in a second memory unit connected in common to the same select gate line as that of the first memory unit, thereby inhibiting either the first or second select transistor from being programmed.
Bibliography:Application Number: US201314017725