CONTROL CIRCUIT OF SRAM AND OPERATING METHOD THEREOF

A control circuit of SRAM and an operating method thereof are provided. The control circuit includes a memory array, a word-line driver, a boost circuit and a voltage level detecting circuit. The memory array includes a plurality of memory cells. Each memory cell includes a plurality of transistors....

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Bibliographic Details
Main Authors CHANG CHI-SHIN, LIEN NANUN, TU MING-HSIEN, CHU LI-WEI, CHUANG CHING-TE, LIAO WEI-NAN
Format Patent
LanguageEnglish
Published 06.03.2014
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A control circuit of SRAM and an operating method thereof are provided. The control circuit includes a memory array, a word-line driver, a boost circuit and a voltage level detecting circuit. The memory array includes a plurality of memory cells. Each memory cell includes a plurality of transistors. The word-line driver is to activate the word-line of the memory array for cell storage data access. The boost circuit is to provide the higher voltage source for the word-line driver and a first operating voltage for boosting the first operating voltage to a second operating voltage. The voltage level detecting circuit is detecting if the first operation voltage needed boosted with boost-operation and a detecting-trigger signal and controls the operating of the boost circuit based on the detecting-trigger signal, the first operating voltage and a predetermined voltage.
Bibliography:Application Number: US201313738111