PROCESSOR AND CONTROL METHOD THEREOF
A processor includes a directory cache provided with a data cache, a memory directory to hold directory information, to hold dirty information indicating if held directory information is the same as that held in the memory directory, and local information indicating that the directory information of...
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Main Author | |
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Format | Patent |
Language | English |
Published |
26.12.2013
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Subjects | |
Online Access | Get full text |
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Summary: | A processor includes a directory cache provided with a data cache, a memory directory to hold directory information, to hold dirty information indicating if held directory information is the same as that held in the memory directory, and local information indicating that the directory information of the memory directory is not held in a data cache of a different processor when the directory information from the memory directory is registered, and makes a setting such that the directory information of the memory directory is the same as directory information held in a data cache of a different processor as dirty information of the directory cache when the directory information of the directory cache and the local information of the directory cache indicate that the directory information of the memory directory is not held in the data cache of the different processor. |
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Bibliography: | Application Number: US201314012699 |