SENSE AMPLIFIER CIRCUITRY FOR RESISTIVE TYPE MEMORY

Example embodiments include a resistive type memory current sense amplifier circuit including differential output terminals, first and second input terminals, pre-charge transistors, and current modulating transistors coupled directly to the pre-charge transistors. The pre-charge configuration provi...

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Bibliographic Details
Main Authors CHA SOOHO, ONG ADRIAN E, KIM CHAN-KYUNG, YOUN YONGSIK
Format Patent
LanguageEnglish
Published 05.12.2013
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:Example embodiments include a resistive type memory current sense amplifier circuit including differential output terminals, first and second input terminals, pre-charge transistors, and current modulating transistors coupled directly to the pre-charge transistors. The pre-charge configuration provides high peak currents to charge the bit line and reference line during a "ready" or "pre-charge" stage of operation of the current sense amplifier circuit. The current modulating transistors are configured to operate in a saturation region mode during at least a "set" or "amplification" stage. The current modulating transistors continuously average a bit line current and a reference line current during the "set" or "amplification" stage, thereby improving noise immunity of the circuit. During a "go" or "latch" stage of operation, a logical value "0" or "1" is latched at the differential output terminals based on positive feedback of a latch circuit.
Bibliography:Application Number: US201213488432