System and Method for Improved Automated Semiconductor Wafer Manufacturing

A method for aligning a photolithographic machine in an automated semiconductor manufacturing system is provided. The method may include identifying a maximum precision degree for a wafer and identifying a maximum overlay correction value. The method may simulate one or more algorithms to determine...

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Bibliographic Details
Main Authors CHIU CHE-YU, CHEN JIAN-HUNG, WU HSUEHN, HSIEH WEN-YAO, PENG ANWEI
Format Patent
LanguageEnglish
Published 26.09.2013
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Summary:A method for aligning a photolithographic machine in an automated semiconductor manufacturing system is provided. The method may include identifying a maximum precision degree for a wafer and identifying a maximum overlay correction value. The method may simulate one or more algorithms to determine whether an algorithm aligns a leading lot within alignment specifications. The method may align a photolithography machine using an algorithm selected based on the simulations.
Bibliography:Application Number: US201313890975