PARTITION-FREE MULTI-SOCKET MEMORY SYSTEM ARCHITECTURE

A technique to increase memory bandwidth for throughput applications. In one embodiment, memory bandwidth can be increased, particularly for throughput applications, without increasing interconnect trace or pin count by pipelining pages between one or more memory storage areas on half cycles of a me...

Full description

Saved in:
Bibliographic Details
Main Author SPRANGLE ERIC
Format Patent
LanguageEnglish
Published 19.09.2013
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:A technique to increase memory bandwidth for throughput applications. In one embodiment, memory bandwidth can be increased, particularly for throughput applications, without increasing interconnect trace or pin count by pipelining pages between one or more memory storage areas on half cycles of a memory access clock.
Bibliography:Application Number: US201313785544