CONTACT BARS FOR MODIFYING STRESS IN SEMICONDUCTOR DEVICE AND RELATED METHOD

Solutions for forming stress optimizing contact bars and contacts are disclosed. In one aspect, a semiconductor device is disclosed including an n-type field effect transistor (NFET) having source/drain regions; a p-type field effect transistor (PFET) having source/drain regions; a stress inducing l...

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Bibliographic Details
Main Authors BRYANT ANDRES, NOWAK EDWARD J, CLARK, JR. WILLIAM F, ANDERSON BRENT A
Format Patent
LanguageEnglish
Published 19.09.2013
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Solutions for forming stress optimizing contact bars and contacts are disclosed. In one aspect, a semiconductor device is disclosed including an n-type field effect transistor (NFET) having source/drain regions; a p-type field effect transistor (PFET) having source/drain regions; a stress inducing layer over both the NFET and the PFET, the stress inducing layer inducing only one of a compressive stress and a tensile stress; a contact bar extending through the stress inducing layer and coupled to at least one of the source/drain regions of a selected device of the PFET and the NFET to modify a stress induced in the selected device compared to a stress induced in the other device; and a round contact extending through the stress inducing layer and coupled to at least one of the source/drain regions of the other device of the PFET and the NFET.
Bibliography:Application Number: US201213424319