MEMORY MODULE FOR HIGH-SPEED OPERATIONS

A memory module includes a plurality of buses. A plurality of memory chips is mounted on a module board and is connected to a first node, a second node, and a plurality of third nodes of the plurality of buses. The first node, the second node, and the third nodes branch off to a first memory chip, a...

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Bibliographic Details
Main Authors LEE JEA-EUN, SUNG MYUNG-HEE, KO CHANG-WOO, LEE YOUNG-HO
Format Patent
LanguageEnglish
Published 15.08.2013
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Summary:A memory module includes a plurality of buses. A plurality of memory chips is mounted on a module board and is connected to a first node, a second node, and a plurality of third nodes of the plurality of buses. The first node, the second node, and the third nodes branch off to a first memory chip, a second memory chip, and the third memory chips, respectively. A length of the plurality of buses between the first and second nodes is longer than a length of the plurality of buses between adjacent nodes from among the second node and the third nodes.
Bibliography:Application Number: US201313766933