STRUCTURE AND METHOD FOR SINGLE GATE NON-VOLATILE MEMORY DEVICE
The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate having a periphery region and a memory region; a field effect transistor disposed in the periphery region and having silicide features; and a single floating gate non-volatile memory devi...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
24.01.2013
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Subjects | |
Online Access | Get full text |
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Summary: | The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate having a periphery region and a memory region; a field effect transistor disposed in the periphery region and having silicide features; and a single floating gate non-volatile memory device disposed in the memory region, free of silicide and having a first gate electrode and a second gate electrode laterally spaced from each other. |
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Bibliography: | Application Number: US201113184823 |