UNIVERSAL CHIP CARRIER AND METHOD

A method of fabricating chip carriers suitable for use in packaging integrated circuits and other electronic, electro-mechanical and opto-electronic devices is described. In general, a number of wires (or wires and rods) are arranged in parallel in a wiring fixture. After the wires are positioned, t...

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Bibliographic Details
Main Authors CHIN DAVID T, DARBINYAN ARTUR, SINCERBOX KURT E
Format Patent
LanguageEnglish
Published 15.11.2012
Subjects
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PERFORMING OPERATIONS
PRINTED CIRCUITS
SHAPING CLAY OR OTHER CERAMIC COMPOSITIONS, SLAG, OR MIXTURESCONTAINING CEMENTITIOUS MATERIAL, e.g. PLASTER
TRANSPORTING
WORKING CEMENT, CLAY, OR STONE
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Summary:A method of fabricating chip carriers suitable for use in packaging integrated circuits and other electronic, electro-mechanical and opto-electronic devices is described. In general, a number of wires (or wires and rods) are arranged in parallel in a wiring fixture. After the wires are positioned, they are encapsulated to form an encapsulated wiring block. The wiring block is then sliced to form a number of discrete panels. Preferably, the various wires are geometrically positioned such that each resulting panel has a large number of device areas defined therein. The encapsulant in each panel effectively forms a substrate and the wire segments in each panel form conductive vias that extend through the substrate. The resulting panels/chip carriers can then be used in a wide variety of packaging applications.
Bibliography:Application Number: US201113106383