NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC APPARATUS
A memory cell array including non-volatile memory cells is divided into a first block including a non-volatile memory cell for accumulating a degradation over time and a second block including a non-volatile memory cell for storing data. A word line select circuit and a bit line select circuit selec...
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Main Authors | , , , , , |
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Format | Patent |
Language | English |
Published |
25.10.2012
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Subjects | |
Online Access | Get full text |
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Summary: | A memory cell array including non-volatile memory cells is divided into a first block including a non-volatile memory cell for accumulating a degradation over time and a second block including a non-volatile memory cell for storing data. A word line select circuit and a bit line select circuit select a first word line and a first bit line connected to the second block to access the non-volatile memory cell for storing data of the second block, and selects a second word line or a second bit line connected to the first block to apply a stress voltage to the non-volatile memory cell for accumulating the degradation over time of the first block, thereby automatically detecting ambient temperature and storing accumulated stress. |
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Bibliography: | Application Number: US201213534677 |