CORELESS LAYER BUILDUP STRUCTURE
A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin.
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
28.06.2012
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Subjects | |
Online Access | Get full text |
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Summary: | A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin. |
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Bibliography: | Application Number: US20100764993 |