INTEGRATED CIRCUIT MANUFACTURING METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT

In layout design step of the semiconductor integrated circuit manufacturing method, when it is found that the wiring length between an external terminal and an IO block (external terminal I/F circuit) corresponding to the external terminal increases after a floorplan of a circuit including a functio...

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Bibliographic Details
Main Authors KIYOHARA TOKUZO, IWAHASHI DAISUKE, TOJIMA MASAYOSHI
Format Patent
LanguageEnglish
Published 03.05.2012
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:In layout design step of the semiconductor integrated circuit manufacturing method, when it is found that the wiring length between an external terminal and an IO block (external terminal I/F circuit) corresponding to the external terminal increases after a floorplan of a circuit including a functional block and the IO block is determined, placement of the IO block is determined such that the IO block is placed close to the external terminal to alleviate constraints on the wiring between the IO block and the external terminal, and timing adjustment circuits whose number is determined according to the wiring length of a bus (or a shared bus) connecting a data transfer circuit and the IO block is inserted into the bus.
Bibliography:Application Number: US201113383335