Silicon Chip Having Penetrative Connection Holes
Two circuit layout areas on two surfaces of a chip are connected. Holes in the chip are coordinated with a conductive paste to connect the two surfaces. Thus, fabrication is made easy and cost is reduced.
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| Main Authors | , |
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| Format | Patent |
| Language | English |
| Published |
01.12.2011
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| Subjects | |
| Online Access | Get full text |
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| Abstract | Two circuit layout areas on two surfaces of a chip are connected. Holes in the chip are coordinated with a conductive paste to connect the two surfaces. Thus, fabrication is made easy and cost is reduced. |
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| AbstractList | Two circuit layout areas on two surfaces of a chip are connected. Holes in the chip are coordinated with a conductive paste to connect the two surfaces. Thus, fabrication is made easy and cost is reduced. |
| Author | LAI TUNG-SHENG CHU TSE MIN |
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| Notes | Application Number: US201113041669 |
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| RelatedCompanies | LAI TUNG-SHENG CHU TSE MIN MAO BANG ELECTRONIC CO., LTD |
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| Snippet | Two circuit layout areas on two surfaces of a chip are connected. Holes in the chip are coordinated with a conductive paste to connect the two surfaces. Thus,... |
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| SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| Title | Silicon Chip Having Penetrative Connection Holes |
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