METHOD FOR VERIFYING A TEST SUBSTRATE IN A PROBER UNDER DEFINED THERMAL CONDITIONS

A method and an apparatus for verifying or testing test substrates, i.e. wafers and other electronic semiconductor components, in a prober under defined thermal conditions. Such a verifying apparatus, known to the person skilled in the art as a prober, has a housing having at least two housing secti...

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Bibliographic Details
Main Authors KANEV STOJAN, FLEISCHER HANS-JURGEN, TEICH MICHAEL
Format Patent
LanguageEnglish
Published 06.10.2011
Subjects
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:A method and an apparatus for verifying or testing test substrates, i.e. wafers and other electronic semiconductor components, in a prober under defined thermal conditions. Such a verifying apparatus, known to the person skilled in the art as a prober, has a housing having at least two housing sections, in one housing section of which, designated hereinafter as test chamber, the test substrate to be verified is held by a chuck and is set to a defined temperature, and in the other housing section of which, designated hereinafter as probe chamber, probes are held. For verification purposes, the test substrate and the probes are positioned relative to one another by means of at least one positioning device and the probes subsequently make contact with the test substrate.
Bibliography:Application Number: US200913119145