DOUBLE-SIDED INTEGRATED CIRCUIT CHIPS

A semiconductor structure and method of fabricating the structure. The method includes removing the backside silicon from two silicon-on-insulator wafers having devices fabricated therein and bonding them back to back utilizing the buried oxide layers. Contacts are then formed in the upper wafer to...

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Main Authors LUCE STEPHEN ELLINWOOD, GAMBINO JEFFREY PETER, STAMPER ANTHONY KENDALL, BERNSTEIN KERRY, JAFFE MARK DAVID, DALTON TIMOTHY JOSEPH, KARTSCHOKE PAUL DAVID
Format Patent
LanguageEnglish
Published 06.10.2011
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A semiconductor structure and method of fabricating the structure. The method includes removing the backside silicon from two silicon-on-insulator wafers having devices fabricated therein and bonding them back to back utilizing the buried oxide layers. Contacts are then formed in the upper wafer to devices in the lower wafer and wiring levels are formed on the upper wafer. The lower wafer may include wiring levels. The lower wafer may include landing pads for the contacts. Contacts to the silicon layer of the lower wafer may be silicided.
Bibliography:Application Number: US201113164173