METHOD OF FABRICATING SEMICONDUCTOR DEVICE

Disclosed is a method of fabricating a semiconductor device that includes both an enhancement-mode FET and a depletion-mode FET. The method includes forming an opening in a gate electrode for the depletion-mode FET. The opening is located in or in the vicinity of one of the overlapping regions in wh...

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Bibliographic Details
Main Author SHIBATA MAYUMI
Format Patent
LanguageEnglish
Published 25.08.2011
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Disclosed is a method of fabricating a semiconductor device that includes both an enhancement-mode FET and a depletion-mode FET. The method includes forming an opening in a gate electrode for the depletion-mode FET. The opening is located in or in the vicinity of one of the overlapping regions in which the gate electrode extends over active regions. The method further includes ion-implanting dopant impurities into the active regions at an oblique angle using the gate electrode as a mask, thereby to form the doped region that is located under the opening and continuously extending from one of the opposite sides of the gate electrode to the other.
Bibliography:Application Number: US201113009251