THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME
A thin film transistor array panel is provided and includes a gate line, a gate insulating layer covering the gate line, a semiconductor layer disposed on the gate insulating layer, and a data line and a drain electrode disposed on the semiconductor layer. The data line and the drain electrode have...
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Main Authors | , , , , , |
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Format | Patent |
Language | English |
Published |
16.06.2011
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Subjects | |
Online Access | Get full text |
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Summary: | A thin film transistor array panel is provided and includes a gate line, a gate insulating layer covering the gate line, a semiconductor layer disposed on the gate insulating layer, and a data line and a drain electrode disposed on the semiconductor layer. The data line and the drain electrode have a dual-layered structure including a lower layer and an upper layer with the lower layer having a first portion protruded outside the upper layer and the semiconductor layer having a second portion protruded outside the edge of the lower layer. |
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Bibliography: | Application Number: US20100859792 |