APPARATUS AND METHOD OF REDUCING POWER CONSUMPTION IN DIGITAL IMAGE PROCESSOR

An apparatus and method for reducing power consumption in a digital image processor are disclosed. The apparatus includes a global positioning system (GPS) module using power and configured to generate initial GPS location information of the digital image processor; and a digital signal processor (D...

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Bibliographic Details
Main Authors CHOI JONG-KWAN, KIM TAK-KYOUM
Format Patent
LanguageEnglish
Published 14.04.2011
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Summary:An apparatus and method for reducing power consumption in a digital image processor are disclosed. The apparatus includes a global positioning system (GPS) module using power and configured to generate initial GPS location information of the digital image processor; and a digital signal processor (DSP) configured to receive the initial GPS location information, to set user selected location information for recording in a captured image, and to cut the power to the GPS module. The method includes supplying power to a global positioning system (GPS) module; receiving initial GPS location information of the digital image processor, wherein the initial GPS location is generated by the GPS module; setting a user selected location information to capture an image; and cutting the power to the GPS module.
Bibliography:Application Number: US20100902199