Tri-Gate Field-Effect Transistors Formed By Aspect Ratio Trapping
Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a por...
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Main Author | |
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Format | Patent |
Language | English |
Published |
02.12.2010
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Subjects | |
Online Access | Get full text |
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Summary: | Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach |
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Bibliography: | Application Number: US20100856402 |