PACKET PROCESSING DEVICE BY MULTIPLE PROCESSOR CORES AND PACKET PROCESSING METHOD BY THE SAME

A packet processing device includes multiple processor cores and memory connected to the multiple processor cores, upon reception of a load request of a program, selects a processor core to which the program has not yet been loaded, loads the program to the selected processor core, retains first ass...

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Bibliographic Details
Main Author KANADA YASUSI
Format Patent
LanguageEnglish
Published 26.08.2010
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:A packet processing device includes multiple processor cores and memory connected to the multiple processor cores, upon reception of a load request of a program, selects a processor core to which the program has not yet been loaded, loads the program to the selected processor core, retains first association information that associates attribute information specified by the load request with the processor core to which the program has been loaded, upon reception of the packet, specifies the attribute information corresponding to the received packet, and transfers the received packet to the processor core corresponding to the specified attribute information.
Bibliography:Application Number: US20100708136